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Altera launches FPGA AI Suite 26.1.1 for low-latency edge AI

Altera has rolled out FPGA AI Suite 26.1.1, adding a spatial compiler that maps AI models directly onto Agilex FPGAs for deterministic, low-latency performance. The update delivers ASIC-like inference ...

Altera Brings Determinism to Physical AI Systems with Latest Release of FPGA AI Suite

Altera, the world’s largest pure-play FPGA solutions provider, today announced the release of FPGA AI Suite 26.1.1, a major ...
IEEE

A Fully Reconfigurable Pipelined Architecture for FPGA-Based Parallel PRBS Test Pattern Generators

Abstract: Serial links are widely used for data transfer in data acquisition (DAQ) systems of high-energy physics (HEP) experiments. Pseudorandom binary sequences (PRBSs) based on linear feedback ...
IEEE

Post-Irradiation Fault Injection for Complex FPGA Designs

Abstract: Fault injection is a widely used method of assessing the reliability of field-programmable gate array (FPGA) designs operating in harsh radiation environments. While typically conducted ...